A Dynamically Partial Reconfigurable System Based On FPGA

In 1960s, Geraid Estrin, the professor of University of California, put forward the concept of reconfigurable computing. He also brought a prototype system, by which the theory of reconfigurable computing is established. In late 1970s, DR. Suetlana P. Kartashev and Dr. Steven I. Kartashev mentioned the concept of dynamic reconfigurable system, and they further continued the research about how to form the dynamically reconfigurable system with IC.The reconfigurable technology has been a hot topic of research since 1990s, and systems based on this technology have been applied in many areas.Recently, several institutes and space organization, such as NASA and ESA, have applied reconfigurable technology on space electronics design.Reconfigurable systems of FPGA which this paper focuses on are mainly used in IC design.When using FPGA to establish reconfigurable systems, the system is transformed from a pure space digital logic design to a time-space mixture one.This new type system appears to implement the same function as observed in time scope, but the hardware resource is greatly reduced because of applying the reconfigurable technology. The reconfigurable technology based on FPGA is an innovation in IC design area.Few researches about reconfigurable system are carried out in China.This paper is to introduce a reconfigurable system, in which the FPGA is dynamically and partially reconfigured while the system is running normally.Because the FPGA used in the system is Virtex series which is produced by Xilinx incorporation, the structure, mechanism, and process of configuration based on Xilinx SRAM FPGA is analyzed. The paper also analyses the method of reconfiguration. The module-based design methodology is used to achieve FPGA dynamic partial reconfiguration, through which the FPGA function is divided into several modules, each module possessing separate physical area in FPGA. These modules can be reconfigured when other modules operate normally.The paper also analyses the difference-based reconfiguration method.There is a CPU in the system that control the process of the reconfiguration.A CPLD which is also a Xilinx product is applied as an auxiliary device. FPGA is configured by SelectMAP mode, by which the FPGA can be configured and reconfigured rapidly.The system can also implement the static configuration of the FPGA by serial mode and the dynamic reconfiguration of the FPGA by JTAG mode. The paper also introduces the function of reading back configuration data from FPGA, this function can verify the Single Event Upset. Software which is developed in Visual C++ environment control the process of the reconfiguration, and user could make a little change to transplant this software to other embedded systems.The fruit of this thesis establishes a firm foundation for the actual development of reconfiguration design of avionic device of our country. It affords a good reference to design a reconfigurable system with FPGA.