Design And Implementation Of Image Aciquition And Storage System Based On FPGA

With the rapid development of computer, VLSI and video processing technology, digital image acquisition has been widely applied in the field of communication electronic and image processing. For example, video monitoring system, network video, and so on. Video image acquisition is a mature technology and there are many types of integrated chip used in image acquisition system. Because of the flexibility and the powerfulness, System based on FPGA and PCI bus has been mainstream products.In this paper, consult deal of journals, literature in china and abroad, after comprehensive analysis and comparison of various technical solutions, adopting multi-image acquisition development platform based on FPGA and PCI. Altera Cyclone II series FPGA is logic control center, collect multi-channel PAL model black and white video signal with SAA7111A video decoding chip, store data into SDRAM after asynchronous FIFO cache, sent data to PC by the PCI interface chip PCI9054.In this system, complete FPGA logic design using TOP-DOWN design method, including performance requirements, functional specifications, system environment, interface definition and function description. After full consideration, simplify the design, reduce the consumption of system resources, divide system into modules. Using hardware description language Verilog HDL design a virtual I2C bus module to configure SAA7111A, data acquisition module, asynchronous FIFO with different bit width of writing and reading module, SDRAM controller module and the PCI interface module. After design and implementation of the main modules, integrate every module to form a complete system.After completion of the overall design of the system, compile Testbench driving signal program in Modelsim software to verify every module, analyze the interface timing, metastability of data transmission across different fields is solved effectively in whole system. SDRAM ping-pong operation guarantee nonbreak data transmission. Writing application programe in Visual C++software verify system fuction, test DMA transmission time. System realizes to collect25frame per second of PAL video, and resource occupation rate is low, enhance back-end image processing ability.