Low Power Design And Clock Optimization For Tag Chip Based On Chinese UHF RFID Standard

RFID (Radio Frequency Identification) is a wireless communication technology.Information and power transfer from interrogator to tag by radio frequency wave. Dueto the long operation range, large information stored, high data rate and low cost, UHFRFID will play an important role in the internet of things technology. In deepsub-micron integrated circuit, power has become a critical problem that can’t be ignored.Especially for a passive chip such as UHF RFID tag chip, power consumption affectsthe chip performance greatly. This paper does a lot of researches of tag chip design.Low power architecture is proposed, low power design methods is adopted from coding,logic implementation to physical design based on Chinese UHF RFID Standard.Firstly, this paper gives an analysis to the main causes of power consumption inCMOS circuit. Power consumption is made up of dynamic power and static power. Aseries of low power methods are introduced according to the power analysis. Then theinnovations of Chinese UHF RFID Standard are discussed. Chinese UHF RFIDStandard focused on the communication at physical layer and the principle of RFID tagsystem, which guides the design of digital baseband. Low power architecture is putforward based on Chinese Standard, great efforts has been done to reduce the chippower consumption. TPP encoding, parallel CRC calculating and low power codingstyles contribute a lot to power optimization. Clock-gating is the key method in logicsynthesis stage to reduce power consumption. The power simulation reports show thatdynamic power consumption is reduced by21.1%after synthesis.Secondly, power consumption is mostly determined by the clock design for digitalcircuit. For the demand of Chinese Standard, a complex clock structure is designed. Inthe clock tree synthesis stage, combinational clock tree is analyzed and designedcarefully and lots of low power methods are used. Best solution is firmed up afteranalyzing many power reports. This solution has been proved reducing baseband powergreatly in the silicon test after tape-out.