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Design Of MCU IP Core And Its Application On ZigBee Module

Posted on:2013-11-09Degree:MasterType:Thesis
Country:ChinaCandidate:X X DouFull Text:PDF
GTID:2248330395455459Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the development of VLSI, IC design has entered the era of SoC.In the SoCera, IP core design is of great significance.51series MCU is always the mainstreammicroprocessor in the industry control areas,so this paper introduces the design of theMCU IP core.Based on thorough analysis of MCS51structure and instruction sets,the designedMCU IP core is compatible with51series MCU.According to the Top-Down modulardesign method, the MCU IP core is divided into CPU, timer, interrupt controller, serialcontroller, SPI interface module and CPU module is further subdivided into decoder,register, ALU, divider and multiplier module.The designed interrupt controller has12interrupt sources and two levels of interrupt priority;the timers have four operatingmodes.All the modules of the MCU IP core are programmed with the Verilog HDLlanguage.Every module was functionally simulated by ModelsimSE6.0.The MCU IPcore was simulated,synthesized,implemented in EDA environment of ISE10.1.In thedownload process, we use Xilinx ML507Evaluation Platform as hardware validationplatform.After the design of MCU IP core,this paper build a MCU IP core applicationsystem.This application system realized the application of MCU IP core in the ZigBeeRF module.The designed MCU IP core can execute MCS51instruction sets,and is better thanthe traditional MCS51on both clock frequency and the execution efficiency of theinstruction.This core is designed by Verilog,so it is easy to read,extend and transplant.
Keywords/Search Tags:MCU IP core, Verilog, FPGA
PDF Full Text Request
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