| In the background of the communication technology development, receivertechnology is advancing toward larger receiving bandwidth and higher transmission rate.Software defined radio receiver technology achieved the improvement for receivingsystem from analog to digital, relieving the performance constraint caused by analogdevices.Firstly, this dissertation analyzes the parameter which is usually used for theevaluation of receiver performance, calculates the nonlinear characteristics and noisesource of the receiver, describes the new processing technologies used in software definedradio receiver system including receiver linearization method, spectrum subtractionmethod for reduce background noise, channelization method used polyphase filter, andshort time Fourier transform method for time-frequency analysis.Secondly, this paper designs the data processing step for implementing the algorithm,detailed analysis the calculate unit and processing used for the algorithm, describeshardware resource consumption for implementation algorithm process with specific signalrate, sub-channel bandwidth, filter order, determines the overall system software radioreceiver architecture.At last, this dissertation designes a digital signal processing system for software radioreceiver used PXI bus based industrial computer, introducts the data flows and chipselection for implementing the algorithm in hardware system. The system uses the FPGAof Virtex-6family and TMS320C6455to compose a tightly coupled computing system,providing higher bandwidth up to70Gbps data exchange capability, includingmulti-protocol interface such as Rapid IO, GTX interfaces, SFP optical interface modules,and Gigabit Ethernet. After system function and architecture design, the paper gives adetailed description of chip selection, circuits designation, and PCB drawing requirementsfrom several different parts including high-speed interconnect between chips, on-boardmemory design, power supply, and clock network. |
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