Digital Receiver Anti-fading Technology Research And FPGA Implementation

In the digital radio communication system, the signal transmission could generatefading phenomenon due to channel environment, so that the receiver can not correctlyreceive the valid information. In order to obtain correct information and reduce the errorrate, the system need increase technical methods at the receiving end to compensate non-ideal characteristics of the channel. An automatic gain controller and blind equalizercan solve signal fading problems in the transmission channel. AGC used method isamplify weak signal and weak strong signal, so that the received signal is possible tomaintain the normal operating range of the receiver. Blind equalizer make use of thestatistical properties of the received signal itself to balance channel and eliminateinter-symbol interference. Both techniques are independent and interaction, preferablysolve to the signal fading problem.This paper apply software-defined radio (SDR) technology, on the basis of the idealdigital receiver adds automatic gain control and blind equalizer. This digital receiver hasthe ability of anti-fading. This paper describes the AGC algorithm of automatic gaincontroller and CMA algorithm of blind equalizer, on this basis, to determine the overalldesign of the system and further complete the design of the system’s hardware platform.Two algorithms has been modeled and simulated on the MATLAB platform, andsimulation results have proved the correctness of the structure loop. Using QuartusIIdevelop software to write Verilog HDL code for FPGA implementation of a digitalreceiver. Executed functional simulation by Modelsim, and used hardware test formodules designed by SignaltapII online logic analyzer.In this paper, AGC algorithm using the falling edge of the shaking method, whichmake the design of the loop structure more simple, easier on FPGA, and occupies lesshardware resources. The blind equalizer this paper designed does not need the help of atraining sequence, efficient use of channel bandwidth, and the convergence speed andloop stability is also very good, it can effectively eliminate inter-symbol interferenceand the right to restore the baseband signal. Thus the correctness and the realizability ofthe system have been verified. Therefore, the designed system has a good value of engineering application.