Based On The Spi Interface Design Of The Or1200 Ip Core

SPI is easy to use that is a high-speed,full duplex,synchronous serial peripheral interface.SPI allows the MCU with a variety of peripheral devices to communicate and exchange information in a serial manner,which is the master gives shift pulse, the data bit transmits in the way of the high bit previous low bits and the speed up to100Mbps. SPI is widely used in the digital signal processors, real-time clock,EEPROM, the A/D converter, as well as FLASH and digital signal decoders.The combination of SPI and OR1200design SPI soft-core based on open source OR1200CPU, SPI interface with high speed, low power and resource consumption. At the same time, the SPI interface has four kinds of configuration mode, have the interrupt and the extended speed functions. Most of China’s SOC design use the foreign IP core.Foreign IP core is expensive.foreign IP vendors hold a large part of the profits of the domestic SOC chip; therefore they are the priority to design our own IP core using IP core design technology.In this thesis, the key technology of SPI soft-core design and implementation based on OR1200, specific work is mainly divided into the following sections:SPI interface architecture. According to the SPI protocol and timing research and design the SPI interface architecture and verify that the interface functions.SPI interface design and achieve based on open source CPU OR1200. Designed SPI interface based on the Wishbone bus and the APB bus. Compiling as well as synthesizing and timing analysed in the Quartus software has accurate results.Design verification platform. This thesis design a self-check verification platform and commonly verification platform.Verify the SPI interface and SPI interface based on the Wishbone bus based on the self-check verification platform.Verify Wishbone bus to the AHB bus bridge design, AHB bus to the APB bus bridge design and the SPI interface based on the AHB bus. The result shows that designs meet the design requirements.Based on OR1200SOC hardware and software platforms to design software program. Builded the cross-compiler environment which uses for OR1200in Cygwin.Designed SPI interface verification program using the C language,Compiled and linked in Cygwin to generate the OR1200memory file. Experiments show that SOC hardware and software platform are builded successfully and the software design was correct.SPI soft core design of this paper,using the EP2C5AF256I8device of Cyclone II family of Altera Corporation, which clock frequency is100.74MHz, total logical elements is177, occuping four percent of the total device resources, total combinational functions is139, occuping3%of the number of device combinational logic resource,dedicated register number is130, possession of3%of the number of registers of the devices, the number of pins consumption is25, accounting16percent of the total number of pins of devices. Under the control of the OR1200CPU,the SPI interface completed full-duplex, synchronous communication successful.