The Design Of Wide-band Wireless Communication System Based On FPGA

Both Quadrature Amplitude Modulation (QAM) and Low Density Parity Check Code (LDPC) are widely used in such fields as wireless communication, wired television transmission and satellite communication. The main advantage of QAM modulation system lies in its high bandwidth utilization; however, an in-depth analysis to the QAM shows that the high bandwidth efficiency is obtained at the cost of anti-interference performance, which severely affects the quality of data transmission. The LDPC code can provide almost the optimal bit error rate (BER)-very close to the Shannon limit. Therefore both high bandwidth utilization and low BER can be obtained by combing the encoding and modulation technology, which is an attractive scheme in wireless communications.Binary QAM (4QAM), quaternary QAM (16QAM), and octal QAM (64QAM) are commonly used QAMs, which correspond to4,16,64vector endpoints in constellation, respectively. After studying the basic principle and implementation techniques, we designed a wireless communication module based on4QAM modulation-demodulation and LDPC codec through MATLAB simulations. Under the Xilinx ISE12.2development platform combined with ModelSim SE6.6d, we implemented the following critical sub-modules:general encoding and bit-flip decoding for LDPC; look-up-table based modulation, low-pass filter, local carrier and series-parallel converter for4QAM. General encoding and bit-flip decoding have the advantage of low complexity, thus consuming less FPGA resources. By employing a fast look-up table, the modulation is implemented in an effective way. An improved serial structure is adapted to the low-pass filter, which halves the number of multipliers and saves resources considerably. Both filtering and sampling are pipelined in order to improve the operating frequency.RTL(register transfer level) models are created in Verilog HDL (hardware description language) for all the building blocks in LDPC codec and4QAM modulation-demodulation. An effective testbench is then built in ModelSim6.6d for debugging and functional verification. Thereafter the RTL models are synthesized, mapped, placed and routed under Xilinx ISE12.2environment. Finally, the system is proven to have high accuracy through MATLAB simulation. With good scalability and reliability, the proposed method is applicable for many wireless communication systems.