Design And Implementation Of Memory Compiler For Embedded SOC

The memory design is an integral part in the design of digital systems, it has been widely used in the field of electronic communications, consumer electronics, personal computers, large-scale computer, and satellite, etc.. In the SoC design, designers will typically intended to embed memory into SoC for improving of the system efficiency, while reducing the consumption of the power and the packaging costs. Statistics of SIA (Semiconductor Industry Association) show that the development of integrated circuit technology can lead to larger area of memory in a single chip, thereby the whip hand in the overall SoC area. The proportion of the memory area is expected to increase in the coming years.The present market share of various types of memory is in the order of DRAM, SRAM, ROM, EPROM, of E2PROM and Flash. This shows the wide application prospects of the static random access memory. Design of embedded SRAM usually have two ways:One is the full custom design, according to the requirements of artificial completed circuit, layout, design and stitching. The main considerations of the Full custom design method of memory is memory density, speed, power consumption, yield and package size, etc.. The design cycle usually takes months or even years, and requires a great deal of manpower, material inputs.The final implementation is a memory design for a single user. The other is a Compiler technology, it is the use of pre-designed SRAM module circuit to establish the basic unit library. According to the SRAM word length and word deep, the compiler program calls the proper unit from the library file to finish the implementation of SRAM circuit and layout. The circuit and layout as well as Verilog files is generated automaticly by the compiler. Through a simple setup in the operation interface, the user can produce the required SRAM with the GDSII file and the net list files, users cannot modify the circuit internal structure and layout. In practical applications, different application occasions of memory set different requirements.For specific applications,the design which use the conventional full custom implementation method can get less power consumption,better performance and smaller area, but this method also has high cost and long design cycle, so it is not fit with a wide range of promotion. Therefore the development of a Memory Compiler with specific size range has broad application value.This paper chooses Memory Compiler method, its purpose is the automatic generation of a specific size memory according to the needs of users while maintaining the performance and power consumption. In this paper, we present the actual design process of the compiler in all aspects in detail. A variety of common compiler implementation methods are discussed deeply as well, and ultimately,we realize a SRAM Compiler which can server in larger size range (depth:16-8192word width:2-128bit). This compiler has two kinds of work modes,one is for high speed and low power consumption for the other. In the same process, the SRAM that is generated by our Memory Compiler has better performance than the typical SRAM under the same configuration performance.