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The Design And Implementation Of UART IP Based On AMBA Bus Protocol

Posted on:2012-08-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y XuFull Text:PDF
GTID:2218330341451678Subject:Software engineering
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With the development of technology, complexity of Integrated Circuit is becoming raise. IP-based SoC design is becoming a predominant methodology of IC design. IP soft core is a kind of IP core. It had a big advantage in complicated Integrated Cireuit design because of its flexibility. The significant strongpoint of SoC is the reusing of IP core. How to improve the quality of IP core and built a complete system about IP core evaluating and attestation has been the hot spot in the research recently.Based on the system level requirement specification of the independent reconfigurable media SoC, we have thoroughly studied UART interface specification and AMBA bus specification, extended its function to accomplish the overall function architecture specification. UART specification has flexible methods of control, which include nine ways of operation, four data formats, two methods of data transmission control, several ways to stop transmission and so on. RTL-level logic architecture of UART has been designed and implemented in detail, including baud clock generation, Modem interface, APB bus interface, serial data transmitter and receiver, interrupt/ DMA events, etc. Meanwhile, to match the slow UART serial clock with the high rate system clock, the algorithm of two steps to divide system clock down is achieved. Upon researching the interface timing constraints have great influence on the logic and circuit implementation.Modem interface and APB bus interface has been organized. We optimized the control state machines to make best use of chip resources to implement an UART controller with flexible methods of data receive and transmit functions. Upon researching verification of complicated chip, an system-verification and FPGA-verification platform has been organized, which the function and timing simulation of UART have been fulfilled based on.Moreover, a comprehensive test on FPGA has been schemed for UART design.The results have shown that each timing parameter of UART could meet the constraints of extended specification, and there still remains room.The transmission rate be up to more than 9600bps.It is successful for UART controller to flexibly communicate with the several UART peripherals.The designed UART controller achieves the functions of soft upgrade in reconfigurable media SoC application, has been reached the design goal.
Keywords/Search Tags:UART, APB bridge, SoC, IP core, AMBA, FPGA
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