High Frame Rate Ccd Drive Circuit And Multi-image Parallel Acquisition System

At present, CCD is one of the most widely used opt-electric detective device, the image acquiring system based on CCD is also widely applied in many fields such as military, aircraft, medicine, chemical industry. And high frame rate of the CCD camera has also become more and more popular on the market.In achieving the high frame rate CCD image acquisition system, the difficulty is the large amount of data processing and transmission. Due to using high frame rate CCD, the system employs a parallel concept to handle the high amount of data and the high data transfer rate. This article designed a multi-channel CCD image data parallel processing system. CCD-signal process, converse and transmit in 16 sub-systems. Successfully solve the bottleneck between amount of data and processing capacity.The paper introduces the design and development of CCD camera drive circuit, image acquisition and processing circuit. CCD driving circuit is the core of the timing pulse generator circuit. For the type and the characteristics of CCD chip, the design of this part is based on FPGA, which would produce complex CCD timing pulse and camera control timing pulse. For the precision and simplify the design, integrated chip is also used in other parts of the design.CCD data acquisition system also uses the FPGA , that create the conditions of miniaturization, stability, anti-jamming and online changes, upgrade. In acquisition system, the signal goes through A/D convertor, and then the data output to data compression. The design integrates the CCD drive timing, A/D control timing, data cache in a FPGA, completing the integration design.