Speed ​​data Acquisition, Processing And Transmission System Design

The technology of high-speed data acquisition is widely used in many fields, such as communications, aerospace, radar, and so on. With the development of software radio, communication and image acquisition technology, higher and higher acquisition speed and precision are recommended. Besides, the acquisition device of being portable, networked and intelligent, and the stability and reliability of transmitting the acquired signal to the computer to be displayed and processed are preferred.At the same time, the Ethernet protocol has become the most widely used communication protocol standards in current local area network. In the domain of embedded applications, the Ethernet protocol combined with the data acquisition system, to form LAN, to achieve a reliable data transmission and control, is the current hotspot.This paper describes a design approach of a high-speed data acquisition, processing and transmission system. The system is designed to receive the communication signal range of 275MHz～475MHz. The received signal is sampled with 500Msps high-speed by ADC chip. In FPGA, the frequency band in which there possibly be signal of interest is divided into multiple channels, and down-conversion is done in turn to the channel after the deceleration has been completed. The down-converted signal was measured for carrier frequency, recognized for the modulation type and demodulated in DSP. In this way, the carrier frequency, modulation type and other information of the signal could be obtained. The TCP/IP protocol is embedded into DSP, and the state machine is used to realize the connection and disconnection of the protocol.DSP is employed to control the network chip ENC28J60 to send information or part of the demodulated data of the signal to the computer via the network cable.