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Design And Implementation Of Ethernet High-speed Interface Based On FPGA

Posted on:2017-12-13Degree:MasterType:Thesis
Country:ChinaCandidate:W ZhangFull Text:PDF
GTID:2348330485484637Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the widespread use of the software radio platform the based on the FPGA, It is very convenient to complete the communicatio n between PC and software radio platform by realizing the high speed Ethernet access on the software radio platform.The software radio platform based on FPGA process data in parallel. The processed data get through high speed Ethernet transmission interface. It is important for the study of Ethernet highspeed interface realizing the hardware and software collaborative processing.Therefore, this paper mainly studied on the software defined radio, completing the design of high-speed Ethernet transmission interface based on the FPGA. This design is base on Xilinx company KC705 evaluation board and PC software radio defined platform. The paper has completed the following works:Firstly, this paper based on the Ethernet data communication protocol for data transmission formats and the actual functional requirements, designing the simplif ied TCP/IP protocol stack through implementing UDP/IP protocol. In the design of the high speed Ethernet interface, the user logic part adopted hardware description language for completing UDP/IP format of data encapsulation and realized the upper-layer protocol.Secondly, the paper has designed Ethernet MAC controller based on MAC core and completed the standard Ethernet data frame transmission. The Physical Sublayer has realized PCS and PMA sublayer through the GTX high-speed serial transceiver.GTX and PHY have accomplished the physical layer protocol the Ethernet transmission.Thirdly, the paper has verified the functionality and performance.The results show that it has realized the communication between PC and FPGA. The data transfer rate is up to 942.214 Mbps, closing to the limit value of gigabit Ethernet data transmission rate and loss rate is 0.23% through PC caught the packets.The design can meet the functio na l requirements and performance index of the high-speed Ethernet transmission interface.Through designing and realizing Ethernet high-speed transmission interface on the FPGA, the paper has accomplished high-speed data communication. After the inspectio n and testing, the transmission interface is provided with high transmission rate. Various functions can meet the performance index requirements of high-speed Ethernet interface.
Keywords/Search Tags:software defined radio, Ethernet, high-speed transmission
PDF Full Text Request
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