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Research On High-speed Date Acquisition System Based On Ethernet Interface

Posted on:2009-08-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y J YangFull Text:PDF
GTID:2178360245471313Subject:Precision instruments and machinery
Abstract/Summary:PDF Full Text Request
High-speed data acquisition is important and necessary for acquisition and assessment of radar echo signal. This high-speed data acquisition system designed is based on CPCI bus and have an ethernet interface. It combines high-speed date acquisition and the networking technologies.Research of the dissertation is based on the high-speed data acquisition system at first. About the data acquisition system's performance, combining with theoretical analysis, I design and develop a suit of 100MSPS, 12-bit high-speed data acquisition system, and some techniques on design and implementation of high speed data acquisition system is discussed. The test result indicates that the sampling frequency of the data acquisition.Among the networking technologies, Ethernet is mature with transmission speed up to 10Mb/s,100Mb/s,1000Mb/s in fiber optic communication. Transmission medium have gone the first coaxial cable, twisted pair to the current development of optical fiber.This thesis represents an innovative and reliable remote data transmission solution by overcoming this problem with a well-developed Ethernet physic layer chip. A sample system has already been made and tested. The result shows that this innovative solution is reliable and applicable.
Keywords/Search Tags:High-speed analog signal acquisition card, FPGA, Networking communication technologies, Single Chip Microcontroller, Ethernet PHY
PDF Full Text Request
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