Phase-locked Loop Circuit Signal Integrity Analysis

Phase-locked loop (PLL) has been applied in many fields. The paper shows the signal analysis about the full-chip integrated PLL of HDMI chip, which includes two PLL: main PLL and audio PLL。The RMS jitter is less than 50ps, the determinate jitter is less than 80ps, and the power supply is 1.2v. The paper mainly gives the analysis method for the PLL, and shows some concerns about parameter tradeoffs. Finally, the paper shows the simulation results and layout. Then, the paper focuses on the analysis methods for loop parameters design and noise estimation, and the test chip of a narrow band synthesizer was manufactured with TSMC 90nm CMOS technology to verify the analysis.In the part of loop parameters analysis, the influence on loop stability of parameters variations caused by process, voltage and temperature (PVT) etc is quantities analyzed. Based on the analysis, the method of parameters analysis with stability optimization is proposed.In the part of noise estimation, the new sampling equivalent noise model for charge pump is proposed, and the block noise estimation based on the loop parameters or the design specification is suggested to estimate the whole loop noise.Finally, through the simulation and chip test, the proposed parameter analysis method based on stability analysis and optimization is verified, and the proposed sampling-equivalent noise model for charge pump and the method for noise estimation is also verified. Additionally, the novel circuits such as differential charge pump and VCO are validated.In general, the thesis discusses the method and complete procedure from system parameter design to circuits design for frequency synthesizers. At the end of the paper, the optimization method for noise optimization is discussed, which is the good reference for further research.