Ccd Image Sensor Readout Circuit Research And Design

The readout circuit of CCD image sensor is the interface of CCD device and the following DSP circuits. The function of readout circuit is to amplify the low signal and reject the noise. And the accuracy of the all CCD system is determined by the performance of the readout circuit. With the speed becoming faster and the spots becoming more, the circuit need to operate faster, less noisy, and have more dynamic range and more functions integrated.This thesis studies the CCD readout circuit integrated on single chip. The sub-module includes pre-amplifier, lowpass filter and the correlated double sampling circuit. On the design, the theoretical models and corresponding circuit implement are discussed for the sub-module, which focus on precision, speed and noise. Finally, a 2MHz readout frequency and 10 more bit accuracy read circuit for CCD image sensor is designed based on UMC 0.18μm CMOS process. The details include:1) The structrure and noise of CCD device circuits are discussed, and it emphasizes the reset noise which may be main noise source. The expression of the reset noise is caculated, and the relativity of reset noise is analysed, with the relativity coefficient deduced. Correlated double sampling circuit(CDS) is adoped to reduce the reset noise due to the relativity.2) Based on the configuration of pre-amplifer, the paper reseach all the factors which influence accuracy and speed, such as the limited gain and gain bandwidth of Op-amp, the noise and the offset voltage, from which, the guideline of the Op-amp are caculated. The -3dB bandwidth is also determined, which lies on the 2MHz readout frequency and the requirement of noise rejection for CDS circuit.3) The operational amplifiers for each module of the readout circuit are designed, which cover the common Op-amp for isolation and Op-amp with output stage for driving low resistance. The noise and offset voltage are also computed, by optimization of the parameter, noise and offset can be heavily reduced. The simulation result shows that the gain of the Op-amp is 78dB, the UBW is 30MHz, and the phase margin is 58?, which satisfies the demand of system.4) The system transfer function of CDS is deduced. Two CDS circuits are designed, the charge injection error is investigated for them. The analysis and simulation results indicate that the latter one can make the error much less, which meets 10 bit accuracy.5) Based on UMC 0.18μm CMOS process, a CCD prototype readout circuit is designed with power supply 3.3V and readout frequency 2MHz. The simulation results show that gain is 5 with the largest swing 1V, the precision is within 0.4mV, which means more than 10 bit.