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Cmos Rail-to-rail Operational Amplifier Chip Design

Posted on:2010-06-28Degree:MasterType:Thesis
Country:ChinaCandidate:R FuFull Text:PDF
GTID:2208360272993914Subject:Microelectronics and Solid State Electronics
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As the most widely used block in the analog and mixed-signal circuits, the precision and stability of the operational amplifier (op-amp) determines the performances of the whole system. In this thesis, the schematic and layout of CMOS rail-to-rail op-amp has been created, which has excellent input /output swing ranges and other advantages.Firstly, for the input/output stage, bias circuit and the frequency compensated block in rail-to-rail op-amp have been established with analyzed carefully. In particular, two pairs of n-channel differential pairs have been used as the input stage to solve the mismatching problem among the different input devices. In order to maintain the transconductances constant, the compensation circuit of signal currents has been used.Secondly, the important aided circuits, such as a CMOS bandgap reference and an over temperature protection circuit have been designed. The bandgap reference circuit is mainly provides reference voltage with low temperature coefficient to the op-amp. Based on the analysis of the principle and curvature of bandgap reference, a current-mode curvature-compensated bandgap reference has been designed. For the purpose of protecting the circuit against the over high temperature, PN junction has been used as internal sensor . because of its voltage temperature property, whose input has been compared with output voltage of comparator.Then, the layout of op-amp, aided circuit and ESD pad has been created in detail. After analyzing the inefficacy mechanism of integrated devices, the design scheme and the optimizing mode of the layout have been proposed. The reasons which cause the mismatching and its influence on the circuit have been investigated, so that the circuit and the layout could be optimized for matching.Finally, the op-amp chip is simulated based on the BSIM3v3 model of a standard CSMC 0.6μm process, and compared with circuits' performance. The result indicate that the input /output swing of the op-amp circuit meets the demand of the rail-to-rail circuit, the maximum variation of transconductance is within±10%, the open loop gain can reach 99dB with unity gain bandwidth of 9.96MHz, and phase margin is 58°.
Keywords/Search Tags:analog IC, operational amplifier, layout design, matching, ESD protect
PDF Full Text Request
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