Design Of CMOS Operational Amplifieres Based On The Solving Of Performance Equations

The design automation of analog integrated circuit is a long-term concern in the EDA(Electronic Design Automation).This thesis presents a study on the automatic sizing of CMOS operational amplifiers.The traditional method of automatic sizing is mostly based on the numerical optimization techniques,which generally require a large amount of calculations,and its application in practice is still very limited.Firstly,the essence of analog circuit sizing is examined from the point of view of the performance equations solving.It is demonstrated that traditional manual design procedure of the two-stage CMOS operational amplifier is equivqlent to a sequential solving process of the circuit performance equations under the assumption of the simplied square-law MOS model and the neglecting of the parastic effects in the circuit.The errors caused by the MOS model and the parastic effects in such a procedure are eliminated by the later manual tuning stage.With this observation,the idea of relaxation iteration for the solution of nonlinear equations is used to make up for the errors in the traditional manual sizing process.By compensating the two kinds of such errors,i.e,the error in the simplified MOS model and the error in the analytic approximation of the performance metrics,and executing the modified manual design procedure repeatedly,an accurate design of this amplifier can be realized.According to the general classification in the field of analog design automation,the method presented in this paper belongs to the knowledge-based method,but overcomes its drawback of the inaccuracy in the design results.The method is further extended to other kinds of amplifiers,including the single-ended and fully differential cascode amplifiers.Its utility and effects are verified by the simulated design under a commercial design process of 0.18μm and 90nm.The results show that the method can eliminate all the errors existed in the traditional design procedures and achieve accurate design.Compared with the conventional optimization techniques,the advantage of the proposed method is the computational efficiency can be greatly improved.The thesis also discusses the application of this method under the PVT(process-voltage-temprature)fluctuations.The PVT-aware solution can be obtained by iteratively modifying the performance metrics in the TT corner and verifying them in all the other process corners.The experimental results are given and the efficiency and the effectiveness of such an approach is demonstrated.