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Study On The Optimization Process Of CMOS Operational Amplifier Design Based On Gm/ID Method

Posted on:2021-11-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z M HanFull Text:PDF
GTID:2518306305959749Subject:Circuits and Systems
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With the advent of the era of artificial intelligence,the development of semiconductor chip technology is becoming more and more rapid,the status of analog integrated circuit is becoming more and more important,and the state's support for integrated circuit is also increasing rapidly.As the core of chip design,analog integrated circuit design has always been a research hot focus.With the progress of technology,the scale of analog integrated circuit is getting larger and larger,more and more specification need to be referred to in design,and the constraint relationship is becoming more and more complex.The research in the design method based on gm/ID parameters has important practical significance to shorten the design cycle,improve the design efficiency and design hit rate.This paper firstly introduces the current analysis of the MOSFET under the CSM and the small signal parameters under the EKV model.Through the relationship of the small signal parameters,a design optimization method of analog integrated circuit based on optimized gm/ID parameters is proposed.By studying the relationship between the gm/ID parameter and the working characteristic of MOSFET working in different area test and verify the reliability of this method,sweep the relation of MOSFET small signal parameters,establish a relationship for the center with the gm/ID parameter curves and Lookup Table,which are able to quickly determine the parameters of the device,simplify the design process and the calculation,the precise calculation during the manual estimation period can effectively reduce the error caused by the designer's inexperience.There is a complete and detail example that clearly demonstrates the gm/ID methodology for a simple two-stage operational amplifier design and optimization.Simulation based on Cadence Spectre 0.5?m process showed that this methodology can minimize the error between manual and simulation under the acceptable range and satisfies the desired specifications,the method proved to have good design effect.
Keywords/Search Tags:Analog integrated circuit, CSM, EKV model, Transconductance, Drain-Source current, Operational amplifier
PDF Full Text Request
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