Research And Design Of The New Rail-to-rail Operational Amplifier

In this thesis, analysed and designed the architecture of the new type CMOS Rail-to-Rail operational amplifiers in detail, and successfully designed one of two stage compact CMOS Rail-to-Rail amplifier and the CMOS bandgap reference current source. Specifically analysed and presented the common-mode differential input stage, linear transconductance control circuit of input stage, current sum circuit, floating AB-class control output stage, the bias circuit of OP Amps and the bandgap reference current source circuit. Analysed the frequence compensation and noise response of the Op Amps extent. Based on the possess technics, using the Hspice(Level 49) transistor models which offered by the UMC company, simulated the performance of the circuits in great detail. In the case of layout design, discussed the effect and application of the transistor matching in the circuits design deeply. Demonstrated the circuit layout check by LVS design. To be mentioned that the bandgap reference current source is vital for the Op Amps to improve its performance, and it didn't affect the circuits' power disspation too much. The basic design parameters are up to the index of foreign same product.