Fpga-based High-speed Data Recording System

Analyzed the existing data recording systems, this thesis designs a host-independent data recording system implementing a recording controller and a hard disk controller in a PLD and a storage device using IDE hard disk. The characteristics of the system are high speed data recording rate, large storage capacity and low cost.The thesis compares several recording system of different architectures and based on the requirement on the high speed recording rate, high agility, and low cost of the system, we adopts the architecture of FPGA and IDE hard disk. The controller is compatible with the ATA interface specification, and the highest data burst transfer rate between the controller and the hard disk obey the mode 4 of Ultra DMA in ATA interface. Based on the ATA interface specification the thesis divides the function of the controller into several modules, the top module then joint every part together. After compilation, synthesis, placing, routing and simulation in Quartus II, the post simulation results show that the data burst transfer rate between the FPGA and the hard disk can reach 66.6MByte/s at the frequency of 100Mhz in the FPGA, meeting the requirement of mode 4 of Ultra DMA. It shows the design is correct and feasible. We design the controller in Cyclone EP1C6Q240C8, it's a lowest power, lowest cost and good performance FPGA. And we choose IDT72V295L10 as data cache between data source and FPGA. Besides the two parts of the design, other hardware modules include power supply, reset generation, clock management, configuration of FPGA and the interface between the FPGA and hard disk.The work having finished in this thesis is meaningful to the data recording system design. In the end, the thesis summarizes its main achievements, and gives some useful advice to the future work.