High-performance Microprocessor Cache (cache) Back-end Design

Cache is one of the most important parts in high performance CPU. The paper introduces how to make up a large capacity cache with SRAM, and how to make the performance of cache reaching 1GHZ. It explores the methodology of cache design in circuit and layout.The circuit Architecture, memory cell, read-write circuit design and decode circuit design are also introduced in this paper detailedly. The Design-For-Test, Build-In-Self-Test, Build-In- Self-Repair methodologies are consisted in this paper. The physical design of cache exercises the Full Customer Design methodology.The high performance and the large capacity are the difficulties in cache design. In this project, dynamic and static timing analyses, reliability verification are the main analysis methodology. Cache in the chip works well, reaching the design parameters.