Design Of Nonvolatile-SRAM Bit-cell For L1/L2 Cache

STT-MRAM is the most powerful competitor to replace the traditional SRAM-based volatile cache,however,due to there is a certain gap between SRAM and SRAM in part of the write speed and write power consumption,the concept of non-volatile SRAM(NVSRAM)was proposed.There are two kinds of NV-SRAM bit cells,6T-2MTJ and 8T-2MTJ.The non-volatile write operation of 6T-2MTJ is complex,lead to write power consumption and write delay and other issues,and in the volatile state,due to the introduce of two MTJ,resulting in the performance of 6T-2MTJ's volatile mode is worse than SRAM;8T-2MTJ has large area,more control signal and complex operation and high power consumption issues,make it is not meet the needs of cache.In order to comprehensive the advantages of STT-MRAM and SRAM,this paper based on CPMTJ,proposed a new NV-SRAM bit cell,which has simple operation,better performance in volatile mode,easier write operation and lower power consumption in non-volatile mode.The main work of this paper is as follows:1.The models of MTJ and CPMTJ was establised.In order to establish the correct MTJ and CPMTJ behavior models,this paper first analyzes the basic theory,structural composition and the magnetization reversal principle of MTJ.Then,the existing physical model of MTJ was analyzed.Based on the Hspice language,the behavior models of MTJ and CPMTJ was established.Finally,we verified the correctness of the two kinds of magnetic tunnel junctions,and compare the difference of CPMTJ and MTJ,laid the foundation of this paper.2.The traditional NV-SRAM bit cells have been studied.This paper analyzed the structure and characteristics of 6T-2MTJ and 8T-2MTJ.Study results show that the biggest problem of 6T-2MTJ and 8T-2MTJ is their complicated nonvolatile write operation,resulting in the high operation complexity and power consumption.Othermore,the size of 8T-2MTJ and the characteristics of 6T-2MTJ in SRAM mode also become the obstacle of their use in L1/L2 cache.3.A new NV-SRAM bit cell based on CPMTJ is designed.This paper proposes a NV-SRAM bit cell based on CPMTJ.It not only improves the advantages of 6T-2MTJ and 8T-2MTJ,but also achieves the advantages of proper function,simple operation,less control signal and high integration.The experimental results show that compared with 6T-2MTJ,the non-volatile write time of 6T-1CPMTJ reduced by 8.14%,non-volatile write power consumption reduced by 61.2%;compared to 8T-2MTJ,6T-1CPMTJ nonvolatile write time reduced by 13%,power consumption decreased by 62.1%.