Research And Implementation Of Low-Voltage Memory BIST Technology

In order to meet different application scenarios,the Low-Power technology of SRAM has become a research hotspot in the industry,among which the most direct and effective Low-Power design method is to reduce the working voltage.With the continuous development of manufacturing technology,the fluctuation of process parameters becomes more and more serious in the low voltage working environment,and the stability of SRAM becomes worse and worse.Therefore,the requirement of Low-Voltage SRAM test is higher and higher.In this article,a BIST test scheme for Low-Voltage SRAM half-select stability fault is proposed based on the index of fault coverage and test time.Firstly,the classic design architecture and common fault models of Low-Voltage SRAM are introduced.Secondly,the mechanism of half-select stability problem and the necessity of test are analyzed.Among them,the necessity of test is expounded on the difference between half-select stability problem and common faults,as well as the relationship between half-select stability problem and voltage.The fault model of half-select stability problem is built,and the half-select stability problem caused by parameter fluctuation is mapped to the problem caused by electrical parameters,which is further abstracted into a logical model.Finally,the test elements that can cover the half-select stability fault model are derived:{??W0,??W1R1_?column0?,??R0_?another?,??W1R1_?column1?,??R0_?column0?}.A new test algorithm,March?HS,is proposed by integrating test elements and March C algorithm,which has the advantages of high fault coverage and short test time.Based on a TSMC 40nm Low-Voltage SRAM,the March?HS algorithm was implemented by MBISTArchitect and simulated and analyzed by FIINESIM+VCS co-simulation.The results show that:When the operating voltages were 1V,0.9V and 0.8V,the fault coverage of March?HS increased by 0.3%,8.2%,25.7%,compared with March C.When the operating voltages were 1V,0.9V and 0.8V,the fault coverage of March?HS increased by 0.3%,8.2%,2.7%,compared with March C.In addition,the test complexity of March?HS algorithm is only 12N-2R?N is the number of addresses and R is the number of rows in the array?,so the test time is reduced by about 14%compared with March C+.