Transform To Quantify The Fpga-based H.264 Deblocking Filtering Research And Design

H.264/AVC is the newest video compression standard developed jointly by VCEG with ITU-T and MPEG with ISO/IEC. Some new features have been applied to the new standard, therefore it has improved coding efficiency and network friendliness. It affords the satisfing performance for high quality video transmission and low delay in a given narrow bandwidth.These features include multi-block inter prediction, 1/4 fractional pixel motion estimation, integer transform and quantization, deblocking filter, entropy coding, etc. In this dissertation, the integer transform, quantization, and deblocking filter are expatiated. The entire process of transform and quantization can be carried out using 16-bit integer and only a single multiply per coefficient without any loss of accuracy and inverse transform mismatch. The deblocking filter is applied to every macroblock to reduce blocking distortion at low rate, which improves the appearance of the decoded images.There are two aspects discussed in this dissertation: agrithmetic research and FPGA design and implementation. The key technology in video compression is the compression algorithm in IC. With abundant resource, especially with DSP module, FPGA is reusable and flexible, thus can realize complex algorithm. One of the purposes of this dissertation is to implement the hardware design of these modules based on FPGA. The key parts of these modules are realized with Verilog language. First, with an emphasis on the algorithum of H.264 which is structured of two layers, the concept of the video compression, common video compression standard and their main properties are introduced in this dissertation. Second, an audio and video software platform with VC++ is implemented. Moreover, the design and implementation of the integer transform, quantization, integer inverse transform and inverse quantization are discussed. Furthermore, the logic verification with EDA software and simulation on the testing board of alteral's stratix family FPGA are described, the algorithm of deblocking and the hardware architecture design are expatiated. Finally, a conclusion is made. The main items of my work are listed as follows:1. Read the reference papers, and get familiar with the H.264 especially the algorithm on the integer transform and quantization and deblocking filter, etc.2. Implement the audio-video communication software based on H.264 with VC++.3. Complete the FPGA design and validation of the integer transform, quantization, inverse integer transform and inverse quantization.4. Analyze the algorithms of deblocking filter and design the hardware architecture of deblocking.