Digital Baseband Asic Implementation Of Iso15693 Protocol

RFID (radio frequency identification) is a technology that incorporates the use of electromagnetic or electrostatic coupling in the radio frequency (RF) portion of the electromagnetic spectrum to uniquely identify an object, animal, or person.This paper proposes a new integrated circuit of processor for a passive RFID tag compatible with ISO/IEC 15693. With a novel decoding algorithm, this tag can achieve clock-data-recovery without independent clock signal generated by an oscillator, which is very different from conventional counterparts, especially under 100% ASK modulation. Meanwhile, several low power technologies, such as multi-clock management scheme with gated clock, are also introduced to reduce the power. This design is base on carefully studding the ISO15693 protocol and adopting top-down design method .All the module and testbench running on modle-sim is writing in verilog. This design has been successfully passed functional and FPGA verification.Finally, the chip is implemented under SMIC 0.18um CMOS 2P4M standard process with the core area of 0.9mm* 0.6mm, and achieves low power operation of 2.0μW @ 1.5V voltage.