Design Of UHF RFID Baseband System And Verification Platform Based On EPC C1G2Protocol

Internet of Things(IoT) has been vigorously developed in the information age. Asthe core technology of IoT, RFID(Radio Frequency Identification) has become aresearch hotspot in recent years. UHF RFID, operating in the860MHz~960MHz band,with its advantages of farther working distance, faster rate and so on, is attracting moreand more researchers. The UHF RFID’s protocol specification that is widely recognizedby the international groups is EPC C1G2(EPC Class1Generation2). This protocolprovides explicit specifications for reader and tag’s working process.The baseband systems of reader and tag, both of which are designed using VerilogHDL based on EPC C1G2protocol, are implemented in this thesis. And in order toverify the two systems, a hardware platform is designed.The thesis first introduces the tag’s overall design, which is divided into fivefunction modules, including indata decoding, command parsing, protocol controller,memory and outdata coding. Each module’s realization is given in detail and itssimulation results and interpretations are offered in the end. Meanwhile, sometechnologys are used in module design to save hardware resources and enhance systemstability, such as register reuse, FIFO, register inserted, memory design and so on.Finally, after verified on the platform, the tag’s baseband system is completely feasible.The RFID reader is generally controlled by ARM, and a new design is proposed inthis thesis, which is based on FPGA instead of ARM. Firstly, the advantages of thedesign are illustrated and then the reader’s baseband system is described particularly.The system includes protocol control,oudata process, indata process, and serial interfacecircuit, all of which work in parallel efficiently to complete data encode and decode andprotocol control. After verified, the read’s baseband system works very well.Verification is important for all designs. To test both baseband systems, a hardwareplatform is completed, which is based on ARM and FPGA. The platform integrates thedigital circuit part of a mature reader based on ARM. The test results show that theplatform can successfully undertake the two systems’ verification task.