Font Size: a A A

Based On "dragon R2 Microprocessor Test Structure Design And Research

Posted on:2008-01-21Degree:MasterType:Thesis
Country:ChinaCandidate:K MaoFull Text:PDF
GTID:2208360212979307Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
The research is part of national presearch project. The purpose is to study the structure and method of RISC microprocessor, design 32-bit embedded microprocessor compatible with PowerPC instruction set. The test is necessary for "Longtium R2", which is a million gates microprocessor. In this paper, the author design and implement the test of "Longtium R2".This paper studies the completion of the following:1. Deeply studied DFT algorithm. For the internal structure of "Longtium R2", structural design using full-scan test and built-in self test combination, use JTAG as the whole test interface. Scan test reached 94.94% fault coverage, built-in self test reached 100% fault coverage.2. Research on "Longtium R2" microprocessor test for the needs of the ICD system. Used verilog code to implement preliminary design, and simulated with NCSIM.3. Before taped out, participate in the "Longtium R2" microprocessor FPGA prototype verification. After taped out, responsible for the completion of "Lontium R2" microprocessor test in the ATE test equipment, and debugged on system board developed by Aviation Institute of Computing Technology in Xi'an.4. Studied IEEE 1149.1 and EJTAG, design TAP controller. Analyzed In-Circuit Debug functions, implemented with HSL code, and verified in nc-sim, discussed the availiability of implement on "Longtium R1" microprocessor.
Keywords/Search Tags:"Longtium R2", Boundary Scan, full scan, BIST, On Chip Debug
PDF Full Text Request
Related items