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High-speed Mcu And Fpga And Asic Implementation

Posted on:2007-05-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y SongFull Text:PDF
GTID:2208360185956102Subject:Software engineering
Abstract/Summary:PDF Full Text Request
The target of this research subject is to develop an 8-bit microcontroller, HS-MCU,which makes use of the microchip instruction set and compatible with PIC16C57 of Microchip Technology Inc. Our ultimate goal is to achieve the layout net list after successful FPGA verification and automatic place route.The target of this research project is to develop an 8-bit RISC microcontroller, which is compatible with PICmicroTM mid-range MCU family of Microchip Technology Inc. Author and the team spent more than one year in this project. This MCU include many components such as ALU, W register, Program Counter, Instruction Register, Special Function Register, Instruction EEPROM, data RAM, timer/WDT, and Interrupter. In order to expand the function of the MCU, we generally integrate more and more peripheral component into our chips. Our MCU have many peripheral component such as ADC and analog comparator .FPGA design flow and ASIC design flow are incorporated with each other in this project. In the FPGA design flow the correction of logic and the stabilization of timing is most important design destination. We achieved this object by comprehension of the system architecture, correct partition of the function modules, and effective description of the RTL level of the design. On the other hand, we accomplished the ASIC design flow successfully based on the FPGA design. We have made the most use of various optimization methodology and simulation tools include dynamic simulation, static timing analyzing and post simulation. At last this design net list was past to layout design team in order to check its electronic characters.
Keywords/Search Tags:MCU, RISC, pipeline manager, FPGA design flow, post simulation ASIC design flow, logic synthesis, static timing analyzing
PDF Full Text Request
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