Fpga Implementation Of Np And Phy Communication

At present, there are pretty large interface technologies used in the communication system devices, therefore the designer should choose appropriate devices according to the required functions, and use FPGA to resolve the problems of interface and interaction. Network Processor (NP) is a programmable processor designed for processing data packet, which combines the ability of data processing of ASIC and the programmable characteristic of RISC. It provides a complete uniform solution to design network equipments. But mostly NP can't be directly connected with physical layer devices (PHY) for its limited interface types. So it is very important to establish the seamless connection between NP and PHY. In this dissertation, are studied the transition of communication interface protocols between NP and PHY, and implemention of the seamless connection and rate adaption of different communication interface protocols between BCM1250 (Broadcom Inc.) and PM5351 (PMC-Sierra Inc.) Firstly, are reviewed the development of POS and NP technology, and the progress,design flow-chat and the design technology which is oriented synthesis of Verilog HDL. Then is analyzed the performance of the communication interface protocols transition, and developed the NTP architecture. Lastly, the technology of functional simulation is discussed, especially the technology of Bus Function Model (BFM). In this research project, using TOP-DOWN technique and Verilog HDL, are completed the design of the communication between NP and PHY, its functional simulation and FPGA implementation.