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The Design And Implementation Of Secure Communication Interface Based On Fpga

Posted on:2016-05-24Degree:MasterType:Thesis
Country:ChinaCandidate:Y J JiangFull Text:PDF
GTID:2298330467991823Subject:Signal and Information Processing
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With the speeding up of the railway operation speed, the importance of security issues is also growing. There is certain engineering application value in the thesis for it uses FPGA to implement security communication interface, not only completes the configuration and control of CAN chip, but also realizes the application of the China railway RSSP protocol. This thesis mainly completed the work as follows:Firstly, the CAN protocol is implemented bases on FPGA. The CAN bus controller LAN is the only international standard field bus, MCP2515is excellent at stability, real-time and generality, but due to its unique SPI interface, high complexity of the software implementing is needed. The thesis overcomes this difficulty, designs and simulates the CAN protocol by the method of bottom up.Secondly, the RSSP-I protocol is implemented based on FPGA. RSSP-I is applied to the closed network unit for safety of railway signal equipment. Conventionally, the use of the RSSP-I protocol is very limited. As the protocol is implemented with verilog language and FPGA platform, the application scenarios would be widened. The protocol is designed from two aspects, the transmitter and the receiver. After the completion of the design, simulations on normal communication and abnormal communication are given.Thirdly, the two protocols are combined to form the secure communication interface. The result measured with Signaltap tools shows that the implementation of secure communication interface based on FPGA meets the design requirements.
Keywords/Search Tags:CAN bus, FPGA, verilog, RSSP-I, security protection
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