Based On The Design Of High-level Integrated Mcu Ip Core

With the rapid development of the Information Technology, SOC has become the main direction for the ASIC. The methodology, which based on the IP duplicate technology, can improve the design efficiency at a large degree and decrease the cost, so it is gradually becoming the chief methodology of SOC's design. To develop MCU IP core not only has an abroad application future, but also is important for the advance of IC design in our country.Based on thorough analysis of Intel MCS- 8051 MCU instruction set, the MCU IP soft core's top function definition and structure partition, detailed description of all level modules were finished in the thesis according to the Top-Down high-level design process of digital ASIC system.In the thesis, every level module of the data path and controller of MCU IP core was designed and the every unit's design of MCU IP core was programmed with the Hardware Description Language (VHDL). The every unit's module of IP core was programmed, debugged, placed and routed in EDA environment of ISE and the logical synthesis was done with the Synplify software. The function simulation and the gate-level simulation were done in the ModleSim EDA environment. At the same time, the description style and the design skills of VHDL were discussed in the thesis.The MCU IP soft core existed in two ways, namely, source code in the synthesizable VHDL language and the standard NETLIST document of EDIF. Meanwhile, we did some useful research in the methodology through practicing the whole Top-Down high-level design process of IP core.