| The technology of SOC (System-On-Chip) based on IP-soft Cores and FPGA has more advantages such as flexibility and promptitude, and can also solve much problem on the ASIC design such as long developing period, high cost, high risk and time sensibility of product delivery to market. It would be quickly and widely used in many fields such as consumption electronic products, auto electronic products and industry design. The technology of SOC based on IP-soft Cores and FPGA is paid large attention in IT industry circles at present.Based on thorough analysis of methodology and technologies of SOC, a method based on mc8051 IP soft Core and FPGA was used to design and construct MORSE signal processing SOC, and then a MORSE processing module 's (M-SART, Morse-Serial Asynchronous Receiver / Transmitter) IP-soft Core was designed and fulfilled.In the thesis, based on thorough analyzing serial asynchronous signal frames comparatively between Morse code and ASCII code, a method of digitizing MORSE code is proposed, and then, based on this method, a protocol of MORSE code series asynchronous frame was formulated.Proceeding with analyzing Block diagram and design hierarchy of the mc8051 micro-controller IP-Core, the design hierarchy of the processing MORSE code SOC's IP core was designed. And then, by comparing and analyzing differences between the SIU (Serial Interface Unit) module and the M-SART module, the IP soft core of the M-SART module was programmed with the Hardware Description Language (VHDL), and then, it was debugged, placed and routed in the EDA environment of MaxPlusII, the logic synthesis was also done in the EDA environment of MaxPlusII.The function simulation and the gate-level simulation of the M-SART module were also done in the MaxPlusII. It is proved that the results of the M-SART module processing MORSE code are correct and work reliably, and the M-SART module's work frequency reaches 34.12 MHz, it can match with Core8051 IP Core completely.
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