Design Of USB Controller IP Core For SoC

With the development of Integrated Cnouit technology, the chip's density rises ve: quickly. A system, which consists of microprocessor, coprocessor and some other periphere chips, could be integrated into one chip. The chip containing a system is calle (?)n-on-a-Chip (SoC). Both the computer circles and the electronic engineering circles ha (?)ge attention to the technology of SoC.Because SoC chips' degree of integration is higher, frequency is faster, time coming into the market is shorter, the designers more and more depend on IP core in order to implement the (?) IP core technology is of great importance on SoC field, just as the groundsill of buildings. (?)hodology of IP core includes not only all classical techniques of IC, for example test. (?)on, simulation, low power etc, but also many new research field and method. Universal Serial Bus(USB) quickly takes the regnant status of peripheral interface field for (?) many advantages, for instance the high data transfer rate, a little resource, the capacity of (?)ple peripherals, the character of plug and play and so on. With USB technique widelyit is an inevitable trend. that USB is integrated in SoC chips. Therefore, USB (?)er IP soft core is achieved in this paper. The two configurable characteristics of USB IP, s(?) as configurable number of endpoint and configurable capacity of memory, markedly strengthen the scalable ability and adaptable capacity for diverse SoC chips.With increasingly abundance of IP core, It becomes the research hotspot of SoC field th(?). (?) enhance reusability and integrate diverse IP cores in a SoC chip In this paper, (?) (?)oility of USB IP core is studied, and the concepts of Bus Adapter and IP Core with Contigurable Bus Interface are brought forward, and USB IP core with configurable bus interface is implemented, and three bus adapters, such as WISHBONE, AMBA APB, (?) μProcessor interface, are designed. These characteristics enhance the reusability of US(?) (?) and make(?)t easily adapted to many SoC with diverse OCBs.The achievements of this paper have important practical and realistic significance to IP core design and implementation of SoC field.