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Usb Device Controller Ip And Asic Design

Posted on:2006-10-30Degree:MasterType:Thesis
Country:ChinaCandidate:S G YongFull Text:PDF
GTID:2208360152497521Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Universal Serial Bus(USB) is a new-generation PC's industry standard, it describles the bus attributes,types of transacitions,bus management etc and has been applied PC's external peripheral's interface widely. In the following years, it's complementary protocol USB On-The-Go would apply consumed peripherals quickly. During the analysis of USB1.x and USB2.0's principle,communication specification,system architecture,types of transacitions and data flow mode, this paper designs a USB1.1 function controller IP core which has been coded by verilog HDL and has a special architecture. After the architecture mode been established, it has been simulated and FPGA validated successfully. Then, based on Malaysian ARTISAN 5metal,0.25um standard cell library, I designed a corresponded hard core and explained design details such as synthesis principles,place and route steps,clock-tree generated technique etc. At last, the design passed DRC and LVS test and tape out.
Keywords/Search Tags:USB, IP core, FPGA, ASIC, deep-sub micro
PDF Full Text Request
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