Research On Digital Terminal Of Low Frequency Radio Antenna Array

Since the astronomical observation took its step into the era of full-wave observations, the low frequency radio signal of full-wave observation has become a new important band for observation and provided a new way for research. The radio information in this band plays an important role in the study of solar and other planets radio burst and the related researches in this area are almost in a blank state. Therefore, some countries in Europe and America and China have already started to do some related researches.Chinese Academic of Sciences and the Yunnan Observatory have currently started the project. Now there are four low frequency radio antennas can be used in the test. The low-frequency radio antenna array can be used with the ten-meter solar radio telescope and eleven-meter solar radio telescope which already exist in the Yunnan Observatory. They are applied to accurately observe the radio information in the sun and other planets. However, the low-frequency radio antenna now does not get an appropriate data acquisition and processing terminal. This design is based on spurious free dynamic range, accuracy, speed, and the host computer FFT time and frequency resolution and other parameters, developed a data acquisition system which can collect the data of the low-frequency radio antenna and the parameters meet the requirements.This design firstly receive the low frequency astronomical signal from the low frequency radio antenna by the A/D card, then the A/D card passes the converted digital signals to the FPGA card by the form of differential signal; FPGA integrates and processes the data. Besides, FPGA uses a form of asynchronous FIFO clock domain to pass the data to the PC terminal by Gigabit-Ethernet with User Data-gram Protocol; then the software designed by PC terminal window display the data and processing of FFT.This paper first describes the astronomical radio signal and the related theories of this project. Then the whole design will be divided into several modules with brief introductions. At last, it will explain the implementation of each module in detail. Among all these above, the asynchronous FIFO clock domain, the Gigabit-Ethernet and the integration and processing of the data of UDP and its host will be the focus to introduce. In the end, the signal generator is used as a model to do a integration test, and the actual measured data in the Observatory verifies the feasibility of the project. The result shows that this design can be qualified for the work of collecting, analyzing, storing and displaying the data in this band.