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Design And Research Of 10 - Bit Pipeline ADC

Posted on:2014-01-06Degree:MasterType:Thesis
Country:ChinaCandidate:C ZhangFull Text:PDF
GTID:2208330434470766Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
In recent years, with the development of modern communication, microelectronics and digital signal technology, more and more applications of digital signal processing technology was used in all areas of social life. Accordingly, more and more analog signal is replaced by the digital signal processing technology. The digital-to-analog converter as an essential bridge between the new number of digital and analog has also been rapid development. The research topics include the following aspects:1.Various ADC architectures and their characteristics are deeply investigated and compared, the pipeline architecture is determined to be used.2.The non-idealities of the circuit are carefully investigated in order to identify the circuit requirements for the pipeline ADC. A system level model is used to determine the gain of interstage and the DC gain, unity—gain bandwidth and other parameters.3.A deep investigation is made in the most important modules such as sample and hold,1.5Bit MDAC in Pipeline ADC. And a bootstrapped switch is designed. A gain-boosting folded—cascode op amp is elaborately realized. The circuit is designed, the simulation is carried out, and the layout of the circuit is implemented for the modules in the pipeline ADC.At last, the paper simulated the whole ADC circuit and indicated that this ADC achieves DNL of0.2LSB-0.15LSB, INL of-0.25LSB~0.25LSB,,SNDR of60.49dB, ENOB of9.9Bit, total power consumption of50mW. It mainly reaches the design goal.
Keywords/Search Tags:Pipeline ADC, OPAMP, SH Circuit, MDAC Circuit, layout
PDF Full Text Request
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