The Design And Implementation Of Expansion Bus I/O Port For YHFT-DSPx

The speed of data transfer between chips and data communication between chip and peripheral are becoming more and more important to the performance of Digital Signal Process system (DSPs) in nowadays application of DSP, and so, an I/O port with a superior performance occupies an important place in the design of any DSP. The design and implementation of Expansion I/O port (EBIO) which is a 32bit parallel interface in YHFT-DSPx are expatiated on this paper, and focal points of the work are as follows.1. Ordinary I/O ports are of low efficiency and prone to data loss while switching between peripherals continuously. Aimed at this case, this paper presents a method called"frame process". Accesses to I/O ports are isolated to sections, and each section is a frame which corresponds to a peripheral, and frames are isolated from each other, which ensures the correctness of data communication while I/O ports are continuously switching between peripherals, and improves the flexibility of I/O port.2. This paper makes a profound analysis on the methods of data transfers between different clock domains, and then, according to its own peculiarity, EBIO implements the across-domain transfer function of the standard synchronous FIFO interface by adopting a simple and high efficient transfer methods by means of aligning clock nodes which are often used in back-end design.3. This paper analyses and discusses the usual port timing problem and data sample problem in I/O ports and memory interfaces, and then solves these problems by adopting the methods of aligning clock nodes and asynchronous docking.This paper implements the system design, logical design and verification according to function requirements, and meets the design requirements.