Aresearch Of CompactPCI Bus Technology Used On On-board Computer System

High performance, high reliability, small size, low power, low price, and good adaptability is the requirements for a space project. After doing the research on the development of the space electronic technology in and abroad, this thesis first analyzes the development trend, then chooses AT697 processor as the processor for our system, which is based on the SPARCV8 architecture and uses the core LEON2. The system contains one system with AT697 as its main processor, one general purpose CPCI interface-board, which uses a PCI IP core to transmit the CPCI bus into the local bus, and one backplane.The main idea of this thesis focuses on the following points:First, this thesis designs a CPCI system card, using AT697 as its processor, one 64M byte SDRAM as its main data memory, one 1M byte EEPROM as its instruct memory. Besides, it designs the software to implement the special functions.Second, because the design of software and hardware are related to each other, and the system card should supply to different drivers for different peripherals with different functions, it leads to complexity in designing software and duplication problems. To simplify the situation and solve the problem, this thesis uses the double port RAM as the shared memory to implement the general purpose CPCI interface-card. After doing this, the software designing of system-card is simplified.Third, in order to solve the problem of no protocol IC for PCI in military level, and not all military microprocessor implement PCI interface, this thesis uses Actel core PCIF to transmit the CPCI bus into the local bus. Furthermore, it uses FPGA to control the back-end application. By using FPGA, the design becomes more flexible and expansible.Fourth, this thesis implements the function simulation by writing test bench and using Model SIM as the main tool. In addition, it analyses the waveform got from system testing, and finds that they all meet the protocol's requirements. Moreover, this thesis gets the approximate speed of this system's CPCI bus, which is about 81MBps or higher.