The All Digital Phase Lock Loop Technology For Wireless Communication

In this work, the All Digital Phase Lock Loops technology for wireless communication is firstly introduced. Some design examples are compared and analyzed and the Bang-Bang digital PLL is pointed out to be a possibly optimistic ADPLL architecture at present. Then the non-linear theory of the Bang-Bang digital PLLs is discussed and illustrated. Based on the non-linear theory and techniques developed in conventional PLLs, an ADPLL suit for wireless application is designed. Finally, the behavior level simulation is given and the validity and performance of the proposed ADPLL are verified.The non-linear theory of the Bang-Bang digital PLLs is analyzed by phase plane method. The phase trajectory of the system and the shape and location of the limit cycle are carefully illustrated. The condition for a stable Bang-Bang digital PLL and the steady state dynamic performance are developed by use of conclusion of the phase plane analysis.When design the proposed ADPLL system, two fast locking methods in traditional PLL, the adaptive bandwidth technique and feed forward control, are combined to be applied. The flexible and software reconfigurable features of ADPLLs make these methods much easier to be implemented in the system and the locking-assistance function works effectively. As illustrated by the behavior level simulation, the proposed ADPLL can be locking in about 2μs with a large frequency step.