Research On Test Data Compression For SoC

With rapid development of the System-on-a-Chip (SoC) technologies, due to more and more various Intellectual Property Cores are integrated on one chip, the functions and complexity of chips developed strongly, and volume of test data required in large-scale integrated circuits increases significantly accordingly. However, the storage capacity, frequency and bandwidth of the traditional automatic test equipment (ATE) are limited, which results in longer test time, greatly increased test difficulty and power consumption in the SoC test. These problems can be solved by the replacement of high-end ATE, but it will lead to a distinct increase in the cost of test equipment.Test data compression technology can effectively solve these problems and reduce the requirements of ATE, lower the cost of SoC test. Coding technology is widely used as an important branch of test data compression technology, which can effectively reduce the volume of transmissive test data and the test application time and ease up the amount of test data by the integration of SoC. The thesis makes research in test data compression of SoC by coding.A Pseudo-Symmetry coding (PSC) is proposed. Through the analysis of test data, there are many don't care bits except care bits in test set generated by ATPG. The proportion of don't care bit is one of the key factors that affect the compression ratio. Traditional coding techniques based on encoding runs of 0's and runs of 1's don't effectively make use of character of test data. Two symmetrical types of runs presented in dissertation, such as symmetrical runs of 01's (short: U01) and symmetrical runs of 10's (short: U10),is based on the symmetrical ideal. The PSC is the variable-to-variable code based on encoding four type runs: runs of 0's, runs of 1's, U01, U10. The PSC makes use of don't care bit effectively. Experimental results for ISCAS89 benchmark and theoretical analysis show that PSC can provide higher data compression.Subsequently, a novel scheme of Symmetry-Variable Coding (SVC) is proposed, it calculates partitions symmetrically. Another two symmetrical types of runs is presented, such as symmetrical runs of 0's (short: U00) and symmetrical runs of 1's (short: U11). SVC also is the variable-to-variable code based on encoding four type runs: U00, U11, U01, U10, it calculates partitions symmetrically and shortens the cost of code words, so it increases the compression ratio, Theoretical analysis and experimental results for ISCAS 89 benchmark circuits show that SVC code can provide higher data compression efficiency and has a better adaptability to various test sets. And the decoder for SVC is simple and easy to achieve.