Research On Low-cost Test Methods Based On CircularScan Structure

Full-scan design which upgrades the circuit in the controllability and observability greatly reduces the complexity of test generation, which is considered the most effective method of DFT. The design of full-scan data includes test data and the corresponding test response in general, which are stored in the memory of Automatic Test Equipment (ATE). With the increasing circuit size, mass data storage cost has become a topic of concern, and compression of test data is imperative. People made a lot of compression method for test incentive data. The CircularScan structure is one of many effective solutions.In original CircularScan structure, the scan cells are composed a number of (M) cyclic scan chains. The testing data entries process flowing, and in the same time it can only choose a data scan chain to modify. It takes reasonable modifications of the previous test as test data of the test cycle, which maintains the original number of scan input and reduces the amount of test data effectively. If in the same time a number of scan chains need to modify the data bit can only repeat the process of cyclic shift. In this way, test application time grow exponentially, which could take a long time occupied by ATE, but ATE is very expensive. Therefore, how to reduce CircularScan test application time and reduce testing costs are issues requiring solution.In this thesis, the clock control signal is introduced in the original structure. When the same scan level appears k confronting data bits which need to be updated, the original structures need to repeat rotation for k times. However, in the improved structure of CircularScan, through setting the control signals within the 0 within k-1 hours, you can update the data of the scan level according to the original structure until the necessary amendments to the data are finished. We have carried out simulation experiments on the improved CircularScan. We use ATPG tool "TestGen" generating test set with an X value and take a fault simulation with the fault simulator HOPE. As for the ISCAS'89 benchmark circuits, when setting M as 16, the test application time in the original CircularScan decreases by an average of 63.7%, most up to 81.5%, while the test application time in the improved CircularScan decreases by an average of 87.5%, most up to 92.4%; when setting M as 8,16 and 32, the test data volume in the improved CircularScan, comparing in original CircularScan, decreases respectively by an average of 56.3%,55.9%, and 52.5%, most up to 68.2%, 68.9% and 70.8%. The experiment result shows that the improved CircularScan greatly decreases the test application time and test data volume, thus making this technology have more practical application value.