Digital Channelized Filter Algorithm And Technology Of Realization Based On FPGA

The main characteristics of environment and equipment of electronic warfare signal are that it has wideband frequency coverage bound, many types of pending signals and a work pattern which is normally passive and non-matched receiving. So the electronic warfare receiver generally includes wideband frequency coverage bound, high sensitivity, biggish dynamic range and ability of detecting and processing synchronous signals. As a kind of digital receiver, digital channelized receiver has a unique superior performance, high probability of interception, high sensitivity, large dynamic range, good frequency resolution, and the ability of simultaneous signal processing. These are the research hotspots of electronic warfare equipment technology at home and abroad in recent years.This thesis mainly has a systematic study of the channelized technology of digital channelized receiver based on poly-phase filters. Firstly, according to the current status of the development of electronic warfare, the thesis analyzes the main advantages and development status of wideband radar signal digital channelized receiver. Secondly, the thesis discusses the basic theory of Software Radio technology, including three kinds of mathematical receiver, signal sampling theorem and multirate signal processing, then on this basis studies and derives the efficient architecture of abroadband digital channelized receiver based on poly-phase in depth. Then the thesis studies STFT which is the key theory of implementation of digital channelized based on poly-phase, decribes the signal processing technology after channelization and carries on simulations for channelization processing module to validate the correctness and realization of the module. Finally, the thesis studies the implementation of digital channelization based on FPGA, and has a particular design about functional modules inculing compositor of data, realization of FIFO, implementation of FFT which is the key technology of channelization, implementation of channel detection based on FPGA.