Research And Implementation Of Digital Channelized Reconnaissance Receivers

In modern Electronic Warfare, the electromagnetic environment is increasingly complicated. The main characteristics of the signal frequency bandwidth, the signal intensity to be processed, passive non-cooperative signal detection receiver, and therefore a higher electronic reconnaissance equipment requirements. The tranditonal radar receiver adopts analog receiving mode, which has large temperature drift, worse linear circuit and easily lead to signal frequency and phase information is losted. So the development of digital receiver has become a trend. With the rapid development of technology on radar, the receiver,which is used in the electronic warfare, is required to have a broad instant frequency band, a high sensitivity and a broad dynamic range, to be able to detect multiple signals arrived simultaneously, and to have Real-time processing capacity as well. The digital channelized receiver has become the main development direction for research of wideband digital receiver.This paper first introduces the topic of the application background, development status at home and abroad, and the basic theory of digital receiver, such as the technique of sample, multirate signal processing, digital down converter, is introduced. A less-overlap non-blindzone channelized method was proposed and a channelized digital receiver mathematic model for real signal was established based on the research of the above theory. The simulation results from MATLAB show that the method has the capability of whole probability intercept and capture to broad band signal and testifie the receiver mathematic model as well. In respect of channelized subsequent processing, the CORDIC algorithm was adopted to extract signal envelope and instantaneous phase and the phase difference algorithm was adopted to realize instantaneous frequency measurement. The computer simulations experiments were done, the performances analysed deeply.In respect of system implementation, according to specification requirements of channelized receiver, the high-speed ADC08D1000 of National Semiconductor and the FPGA of ALTERA were adopted to realize a set of digital channelized receiver. The various functions and technical specifications were tested and analyzed in detail at the hardware platform and some improved suggestions were proposed.