Research And Implementation Of Digital Channelized Receiver Based On FPGA

Digital channelized receiver is a product of channelized thought combined withdigital receiver. Compared with the receiver made from traditional simulationmethods, its advantages lay in its simplicity in operation, the ability of retaining thefine information of signals and its long-term storage of data. In the modern war,digital channelized receiver could still be able to intercept signals with highprobability even under sever circumstance. Therefore, the research on digitalchannelized receiver is of great importance for improving the ability of electronicwarfare.In this paper, digital channelized implementation method based on thepoly-phase filter bank structure is explored and the important theories in the processof implementation are analyzed in detail. Aiming at digital channelized receiverwith no blind zone, the proportion of extraction factor and channel number, and thepattern of channel division are also determined. In the post-processing ofchannelization, vector working model of CORDIC theory is studied, and the methodof instantaneous frequency measurement combined with channel arbitration isprovided.According to the receiver function, the design of implementation of digitalchannelized receiver system is built, which includes the sampling clock circuit,high-speed A/D circuit, FPGA circuit and the data transmission circuit. Softwaresolutions are designed. The data sequences to the extraction processing module, thepoly-phase filter, and IDFT calculation. In order to reduce system calculationquantity, the channel selection module selects the channel which has the mostpossibility of signal arrival for subsequent processing. Subsequent processingconsists of CORDIC algorithm module, PDW production and sending module. PDWis created based on the parameter of the received signals and sent. Each module’simplementation is described. Simulation results show that the software solutions ofdigital channelized receiver system can be realized on the FPGA.Finally software program is ported to the hardware platform and the wholesystem is debugged. The system operation result is the same as the counterpart ofsimulation. Through multiple sets of experimental analysis, the system performs thefunctions of digital channelized receiver to meet the design requirements.