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The Research Of Key Technologies Of A Uniform Function-level Programming Model For Supporting Hardware-software Co-design

Posted on:2010-11-19Degree:MasterType:Thesis
Country:ChinaCandidate:T LiuFull Text:PDF
GTID:2178360275982411Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
Reconfigurable System-on-Chip (RSoC) integrates microprocessor, reconfigurable logic unit and other electronic modules into one chip. This kind of platform could provide high performance of costumed hardware and flexibility of software programming. In high-demanding computing applications, this feature can considerably improve system performance. But at present, there are still two difficulties in applying the new computing platform as follows:1. Programming is difficult. Traditional software programming language can only make use of time dimension of design space. And traditional hardware description language can only make use of spatial dimension of design space. But reconfigurable hardware can be programmed in both time and spatial dimensions. In order to achieve good utilization of reconfigurable resources, it requires programmer to be accomplished in hardware and software programming at the same time and to know the details of dynamic reconfiguration and communication between software and hardware.2. Co-design is difficult. Designing an RSoC according to the traditional co-design methodology of"partitioning before implementation", the designer must consider the hardware tasks scheduling for making efficient use of dynamically reconfigurable resources. Since the problem of hardware/software partitioning is very complicated, this is an NP hard problem. Hence to fulfill this whole work should rely on rich experiences and professional skills of the designer.According to the difficulties above, Reconfigurable System-on-Chip is opaque to program, and the utilization of dynamically reconfigurable resources is in low efficiency. To address this issue, this paper proposes and implements a uniform function-level programming model which supports hardware/software co-design. The research work includes:1. Designed a function-level programming model. Established a dynamic hardware-software partitioning flow from system specification to system implementation, which is based on hardware/software co-function-library; Designed a hardware/software co-design integrated development environment for application development and hardware-software partitioning algorithm design.2. Designed hardware/software co-function-library and implemented some examples. The library has been designed as "a C language interface corresponding to software and hardware two implementations". It provides programmer with a unified easy-to-use function call interface, and also provides partitioning objects for partitioning algorithm.3. Designed and implemented dynamic link control scheme. Modified the dynamic linker, so that it will record the state of calling and execution of the co-functions when program is running, and switch the execution mode of the functions in real-time through calling hardware/software partitioning algorithm.Examples of the design and experimental results indicate that this model can facilitate the programming procedure. And under a reasonable partitioning algorithm, programs can effectively use the dynamically reconfigurable resources and its execution is accelerated.
Keywords/Search Tags:Hardware/Software Co-design, Function-level, Programming Model, Co-function-library, Reconfigurable Computing
PDF Full Text Request
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