The Research Of High Efficient Resources Management In Reconfigurable System

The appeal of Reconfigurable System-on-Chip (RSoC) has grown in recent years for RSoC provides promising performance, flexibility and higher performance-price ratio. With dynamic reconfiguration technology, RSoC can support more hardware tasks by multiplexing its hardware resources. Operation System for Reconfigurable System (OS4RS) provides a basic programming model and resource management mechanism for reconfigurable system-on-chip. This paper researches some resource management algorithms and task scheduling strategies for the OS4RS, and has achieved the following results:1. A resources management algorithm based on search route optimization for reconfigurable computing system is proposed, called the border-jump algorithm. The algorithm uses grouping and jump-way to speed up the process of searching the effective placement for hardware tasks. At the same time, the adjacent area of task current effective placement as an important basis for placement optimization is proposed, in order to improve the success rate of task placement. The experiments show that the algorithm has lower time consumption and higher task acceptance rate than the existing algorithms.2. An online scheduling strategy based on unit area speed-up ratio for hardware and software mixed scheduling in reconfigurable computing system is proposed. The strategy gives higher priority and scheduling right to the task owning higher per unit area acceleration rate. This improves the efficiency in terms of the use per unit area of the chip and the throughput per unit time of the system. The experiment results show that in systems which has complex workloads and task characteristics, the scheduling strategy based on unit area speed-up ratio can obtain a higher average task response speed.Finally, the paper describes the development of a Reconfigurable System-on-Chip prototype for the graphics applications. The prototype is based on the Xilinx ML403 platform (XC4VFX12 FPGA). The prototype system implements the accelerated graphics algorithms through the hardware processes (functions), which displays the results to a LCD display through VGA controller. A set of hardware and software collaboration libraries are also implemented to provide necessary functions such as DES, 3DES, etc.