The Research And Design Of The Core Chip Of The Digital TV Cable Set-top Box

With the development of digital technology,HDTV is gradually replacing analog television.During this transition period,the set-top box has held the balance.The set-top box is used to transform digital TV signals into the signals which analog TV sets can display,so we can receive the digital TV signals with analog TV.At present,with the development of IC design,it has been a trend that more people use large-scaled programmable logical devices FPGA to design the circuit.Based on the research of the technologies and standards of digital TV set-top box,the thesis aims at realizing the parts of the channel decoding and source decoding.It mainly studies and analyzes RS decoding during the channel decoding,and the main modules have been simulated in the environment of QuartusⅡ.It also analyzes the demultiplexing process during source decoding,and designs asynchronous FIFO which is used during the whole process of the set-top box.