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Design Of High-speed Asynchronous Data Transimission System Based On FPGA

Posted on:2019-05-25Degree:MasterType:Thesis
Country:ChinaCandidate:X ZhaoFull Text:PDF
GTID:2348330542463949Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The universal asynchronous receiving and transmission(UART)is a kind of asynchronous serial interface which can support short distance and long distance transmission,and its advantages are high transporting rate,high transporting distance,good antijamming performance,simple circuit structure,saving floor-plan resources and so on.However,with the development of society,the capacity of information transmission is becoming larger and larger,and the traditional UART becomes the bottleneck of information transmission.Therefore,it is very important to enhance the transmission rate of UART.FPGA chips have a large number of LE(logic units),together with a large number of routing resources,so that it has very strong flexibility.Therefore,FPGA implemented with UART has great many advantages in terms of transmission speed,flexibility,and cost performance.In this paper,the integrated UART chip is designed with top-down method by FPGA.The designed integrated UART module mainly consists of three modules,and they are low speed UART module,high-speed UART module and reset state machine module.Among them,the low speed UART module is designed according to the traditional UART protocol,and its baud rate is 9600 baud/s.Considering the effects of transmission rate and bit error rate,the low speed of UART module is improved.Compared with the low speed UART module,high-speed UART module increase the 8-bit header.The ping-pang FIFO is used as a buffer,and the verification method adopts the international standard CRC-8 verification mode.Its baud rate has reached 62.5M baud/s.In addition,in order to verify the correctness of low-speed UART,a microcontroller auxiliary circuit is designed to connect the low speed UART module with the microcontroller part,and the two sides communicate with each other according to the UART communication protocol.In the specific design process,we will combine the latest FPGA technology,and use Quartus II 13.1,Modelsim and other EDA software to optimize the modules,function simulation and download.The verification results show that the low-speed UART module and the microcontroller can communicate with each other normally.The high-speed UART module function simulation is correct.The expected design goal has been achieved.
Keywords/Search Tags:UART, FPGA, Modelsim, CRC, Top-down, Ping-pang FIFO
PDF Full Text Request
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