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An Ultra High Speed Digital-to-Analog Converter Using MCML Architecture

Posted on:2010-12-22Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y WangFull Text:PDF
GTID:2178360275497713Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The rapid growth in the area of portable electronic market makes high-speed low-power design technique essential for the application of future laptop computers, mobile phones and digital communication systems.MOS current mode logic (MCML) has small power-delay product, high noise immunity characteristic and relatively low cost, which makes it a promising technique in high-speed low-power mixed signal IC design.In this paper, the principles of high-speed low-power D/A converter and MCML design are analyzed in detail. A 1.8V 10-bit 800MS/s digital to analog converter in SMIC 0.18μm CMOS process is presented. The thermometer decoder and the latch array of the D/A converter are designed in MCML architecture for a high speed operation at the low supply voltage. A MCML current switch driver is proposed to improve the dynamic performance. Careful designs of the bandgap reference and current switching scheme ensure the static performance of the D/A converter. Simulation results show the D/A converter functions well at 1.8V with a sampling rate of 800MS/s. With a 1MHz output signal, the SFDR is 66.2dB at an 800MS/s clock and remains above 60dB up to a 1GS/s clock.
Keywords/Search Tags:D/A converter, current steering, MOS current mode logic, high speed, CMOS
PDF Full Text Request
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